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Snoopy Concert/ROM map
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Bank $00
$C0/0000 Boot Sequence
$C0/0000 E2 20 SEP #$20 ; A = 8 bit $C0/0002 C2 10 REP #$10 ; X/Y = 16 bit $C0/0004 A9 01 LDA #$01 ; Activate FastROM $C0/0006 8D 0D 42 STA $420D $C0/0009 A9 80 LDA #$80 ; FBLANK $C0/000B 8D 00 21 STA $2100 $C0/000E 9C 00 42 STZ $4200 ; Deactivate NMI/HIRQ/VIRQ/Auto Joypad Read $C0/0011 9C 0C 42 STZ $420C ; Deactivate HDMAs $C0/0014 9C 0B 42 STZ $420B ; Deactivate DMAs $C0/0017 9C 40 21 STZ $2140 ; Clear APU Communication Registers $C0/001A 9C 41 21 STZ $2141 $C0/001D 9C 42 21 STZ $2142 $C0/0020 9C 43 21 STZ $2143 $C0/0023 A2 FF 1F LDX #$1FFF ; Stack starts at $1FFF $C0/0026 9A TXS $C0/0027 C2 20 REP #$20 ; Set Direct Page to $0000 $C0/0029 A9 00 00 LDA #$0000 $C0/002C 48 PHA $C0/002D 2B PLD $C0/002E E2 20 SEP #$20 $C0/0030 A9 82 LDA #$82 ; Set Direct Bank to $82 $C0/0032 48 PHA $C0/0033 AB PLB $C0/0034 E2 20 SEP #$20 ; Probably unnecessary line $C0/0036 A2 00 E0 LDX #$E000 A:0082 X:1FFF Y:0000 P:eNvMxdIzC $C0/0039 A0 00 00 LDY #$0000 A:0082 X:E000 Y:0000 P:eNvMxdIzC $C0/003C A9 C0 LDA #$C0 A:0082 X:E000 Y:0000 P:envMxdIZC $C0/003E 85 11 STA $11 [$00:0011] A:00C0 X:E000 Y:0000 P:eNvMxdIzC $C0/0040 C2 20 REP #$20 A:00C0 X:E000 Y:0000 P:eNvMxdIzC $C0/0042 A9 73 00 LDA #$0073 A:00C0 X:E000 Y:0000 P:eNvmxdIzC $C0/0045 85 0F STA $0F [$00:000F] A:0073 X:E000 Y:0000 P:envmxdIzC $C0/0047 64 12 STZ $12 [$00:0012] A:0073 X:E000 Y:0000 P:envmxdIzC $C0/0049 B7 0F LDA [$0F],y[$C0:0073] A:0073 X:E000 Y:0000 P:envmxdIzC $C0/004B DF 00 00 7E CMP $7E0000,x[$7E:E000] A:6948 X:E000 Y:0000 P:envmxdIzC $C0/004F 9F 00 00 7E STA $7E0000,x[$7E:E000] A:6948 X:E000 Y:0000 P:envmxdIzC $C0/0053 F0 05 BEQ $05 [$005A] A:6948 X:E000 Y:0000 P:envmxdIzC $C0/0055 A9 01 00 LDA #$0001 A:6948 X:E000 Y:0000 P:envmxdIzC $C0/0058 85 12 STA $12 [$00:0012] A:0001 X:E000 Y:0000 P:envmxdIzC $C0/005A C8 INY A:0001 X:E000 Y:0000 P:envmxdIzC $C0/005B C8 INY A:0001 X:E000 Y:0001 P:envmxdIzC $C0/005C 98 TYA A:0001 X:E000 Y:0002 P:envmxdIzC $C0/005D 29 0F 00 AND #$000F A:0002 X:E000 Y:0002 P:envmxdIzC $C0/0060 A8 TAY A:0002 X:E000 Y:0002 P:envmxdIzC $C0/0061 E8 INX A:0002 X:E000 Y:0002 P:envmxdIzC $C0/0062 E8 INX A:0002 X:E001 Y:0002 P:eNvmxdIzC $C0/0063 D0 E4 BNE $E4 [$0049] A:0002 X:E002 Y:0002 P:eNvmxdIzC $C0/0065 A9 34 12 LDA #$1234 A:0000 X:0000 Y:0000 P:envmxdIZc $C0/0068 CD 04 01 CMP $0104 [$82:0104] A:1234 X:0000 Y:0000 P:envmxdIzc $C0/006B D0 16 BNE $16 [$0083] A:1234 X:0000 Y:0000 P:eNvmxdIzc
$C0/0083 C2 20 REP #$20 A:1234 X:0000 Y:0000 P:eNvmxdIzc $C0/0085 A9 00 00 LDA #$0000 ; Clear Loop for $7E/0000 to $7E/DFFF $C0/0088 AA TAX $C0/0089 9F 00 00 7E STA $7E0000,x $C0/008D E8 INX $C0/008E E8 INX $C0/008F E0 00 E0 CPX #$E000 $C0/0092 D0 F5 BNE $F5 ; [$0089] $C0/0094 AA TAX ; Clear Loop for whole Bank $7F $C0/0095 9F 00 00 7F STA $7F0000,x $C0/0099 E8 INX $C0/009A E8 INX $C0/009B D0 F8 BNE $F8 ; [$0095] $C0/009D 20 DE 01 JSR $01DE [$C0:01DE] A:0000 X:0000 Y:0000 P:envmxdIZC $C0/00A0 E2 20 SEP #$20 A:05E5 X:0000 Y:0003 P:envMXdIZC $C0/00A2 9C 06 01 STZ $0106 [$82:0106] A:05E5 X:0000 Y:0003 P:envMXdIZC $C0/00A5 9C 07 01 STZ $0107 [$82:0107] A:05E5 X:0000 Y:0003 P:envMXdIZC $C0/00A8 C2 20 REP #$20 A:05E5 X:0000 Y:0003 P:envMXdIZC $C0/00AA AD 04 01 LDA $0104 [$82:0104] A:05E5 X:0000 Y:0003 P:envmXdIZC $C0/00AD C9 34 12 CMP #$1234 A:0000 X:0000 Y:0003 P:envmXdIZC $C0/00B0 D0 07 BNE $07 [$00B9] A:0000 X:0000 Y:0003 P:eNvmXdIzc $C0/00B9 C2 20 REP #$20 A:0000 X:0000 Y:0003 P:eNvmXdIzc $C0/00BB A9 34 12 LDA #$1234 A:0000 X:0000 Y:0003 P:eNvmXdIzc $C0/00BE 8D 04 01 STA $0104 [$82:0104] A:1234 X:0000 Y:0003 P:envmXdIzc $C0/00C1 20 E9 00 JSR $00E9 ; Graphic Settings $C0/00C4 E2 20 SEP #$20 A:1234 X:0000 Y:0003 P:envmXdIzc $C0/00C6 A9 58 LDA #$58 A:1234 X:0000 Y:0003 P:envMXdIzc $C0/00C8 8D 0B 01 STA $010B [$82:010B] A:1258 X:0000 Y:0003 P:envMXdIzc $C0/00CB A9 02 LDA #$02 A:1258 X:0000 Y:0003 P:envMXdIzc $C0/00CD 8D 0C 01 STA $010C [$82:010C] A:1202 X:0000 Y:0003 P:envMXdIzc $C0/00D0 A9 C0 LDA #$C0 A:1202 X:0000 Y:0003 P:envMXdIzc $C0/00D2 8D 0D 01 STA $010D [$82:010D] A:12C0 X:0000 Y:0003 P:eNvMXdIzc $C0/00D5 20 22 09 JSR $0922 [$C0:0922] A:12C0 X:0000 Y:0003 P:eNvMXdIzc $C0/00D8 AD 08 01 LDA $0108 ; Deactivate NMI $C0/00DB 29 CF AND #$CF $C0/00DD 8D 00 42 STA $4200 $C0/00E0 8D 08 01 STA $0108 $C0/00E3 58 CLI ; Enable interrupts $C0/00E4 20 0D 0D JSR $0D0D [$C0:0D0D] A:1201 X:0000 Y:0003 P:envMXdizc
$C0/00E9 Graphic Settings
This subroutine sets a lot of screen settings. For more detail, see comments at $C0/00F4
$C0/00E9 22 C5 07 C0 JSL $C007C5 ; Set values of a number of registers
Arguments: $C0/00ED C0 F4 00 00 4E 00 ; Transfer #$4E data sets from $C0/00F4
$C0/00F3 60 RTS
$C0/00F4 Data for $C0/00E9
A whole lot of graphic settings, see $C0/00E9
$C0/00F4 00 42 01 ; Data Set #$01: Activate Auto Joypad Read, Deactivate NMI/HIRQ/VIRQ $C0/00F7 08 01 01 ; Data Set #$02: Update $4200 buffer, too $C0/00FA 16 40 00 ; Data Set #$03: Clear Joypad Input Register $C0/00FD 17 40 00 ; Data Set #$04: Clear Joypad Input Register $C0/0100 01 42 FF ; Data Set #$05: VBLANK Flag register... read only!? Unnecessary line? $C0/0103 02 42 00 ; Data Set #$06: Unused CPU Port? Unnecessary line? $C0/0106 03 42 00 ; Data Set #$07: Unused CPU Port? Unnecessary line? $C0/0109 04 42 00 ; Data Set #$08: Unused CPU Port? Unnecessary line? $C0/010C 05 42 00 ; Data Set #$09: Unused CPU Port? Unnecessary line? $C0/010F 06 42 00 ; Data Set #$0A: Unused CPU Port? Unnecessary line? $C0/0112 07 42 00 ; Data Set #$0B: Unused CPU Port? Unnecessary line? $C0/0115 08 42 00 ; Data Set #$0C: Unused CPU Port? Unnecessary line? $C0/0118 09 42 00 ; Data Set #$0D: Unused CPU Port? Unnecessary line? $C0/011B 0A 42 00 ; Data Set #$0E: Unused CPU Port? Unnecessary line? $C0/011E 0B 42 00 ; Data Set #$0F: Unused CPU Port? Unnecessary line? $C0/0121 0C 42 00 ; Data Set #$10: Unused CPU Port? Unnecessary line? $C0/0124 00 21 80 ; Data Set #$11: FBLANK $C0/0127 09 01 80 ; Data Set #$12: Update $2100 buffer, too $C0/012A 02 21 00 ; Data Set #$13: OAM Address $8000 $C0/012D 03 21 80 ; Data Set #$14: OAM Address $8000 $C0/0130 04 21 00 ; Data Set #$15: Write #$0000 to OAM $C0/0133 04 21 00 ; Data Set #$16: Write #$0000 to OAM $C0/0136 0D 21 00 ; Data Set #$17: BG1 H-Scroll = #$0000 $C0/0139 0D 21 00 ; Data Set #$18: BG1 H-Scroll = #$0000 $C0/013C 0E 21 00 ; Data Set #$19: BG1 V-Scroll = #$0000 $C0/013F 0E 21 00 ; Data Set #$1A: BG1 V-Scroll = #$0000 $C0/0142 0F 21 00 ; Data Set #$1B: BG2 H-Scroll = #$0000 $C0/0145 0F 21 00 ; Data Set #$1C: BG2 H-Scroll = #$0000 $C0/0148 10 21 00 ; Data Set #$1D: BG2 V-Scroll = #$0000 $C0/014B 10 21 00 ; Data Set #$1E: BG2 V-Scroll = #$0000 $C0/014E 11 21 00 ; Data Set #$1F: BG3 H-Scroll = #$0000 $C0/0151 11 21 00 ; Data Set #$20: BG3 H-Scroll = #$0000 $C0/0154 12 21 00 ; Data Set #$21: BG3 V-Scroll = #$0000 $C0/0157 12 21 00 ; Data Set #$22: BG3 V-Scroll = #$0000 $C0/015A 13 21 00 ; Data Set #$23: BG4 H-Scroll = #$0000 $C0/015D 13 21 00 ; Data Set #$24: BG4 H-Scroll = #$0000 $C0/0160 14 21 00 ; Data Set #$25: BG4 V-Scroll = #$0000 $C0/0163 14 21 00 ; Data Set #$26: BG4 V-Scroll = #$0000 $C0/0166 15 21 00 ; Data Set #$27: VRAM Settings $C0/0169 16 21 00 ; Data Set #$28: VRAM Address Low Byte $C0/016C 17 21 00 ; Data Set #$29: VRAM Address High Byte $C0/016F 18 21 00 ; Data Set #$2A: Write $0000 to VRAM $C0/0172 19 21 00 ; Data Set #$2B: Write $0000 to VRAM $C0/0175 1A 21 00 ; Data Set #$2C: Mode 7 - Clear Rotation Scaling Settings $C0/0178 1B 21 00 ; Data Set #$2D: Mode 7 - Rotation/Scaling Parameter A $C0/017B 1B 21 01 ; Data Set #$2E: Mode 7 - Rotation/Scaling Parameter A $C0/017E 1C 21 00 ; Data Set #$2F: Mode 7 - Rotation/Scaling Parameter B $C0/0181 1C 21 00 ; Data Set #$30: Mode 7 - Rotation/Scaling Parameter B $C0/0184 1D 21 00 ; Data Set #$31: Mode 7 - Rotation/Scaling Parameter C $C0/0187 1D 21 00 ; Data Set #$32: Mode 7 - Rotation/Scaling Parameter C $C0/018A 1E 21 00 ; Data Set #$33: Mode 7 - Rotation/Scaling Parameter D $C0/018D 1E 21 01 ; Data Set #$34: Mode 7 - Rotation/Scaling Parameter D $C0/0190 1F 21 00 ; Data Set #$35: Mode 7 - Rotation/Scaling Center Coordinate X $C0/0193 1F 21 00 ; Data Set #$36: Mode 7 - Rotation/Scaling Center Coordinate X $C0/0196 20 21 00 ; Data Set #$37: Mode 7 - Rotation/Scaling Center Coordinate Y $C0/0199 20 21 00 ; Data Set #$38: Mode 7 - Rotation/Scaling Center Coordinate Y $C0/019C 21 21 00 ; Data Set #$39: CGRAM Address: #$00 $C0/019F 22 21 00 ; Data Set #$3A: Write #$0000 to CGRAM (Pitchblack) $C0/01A2 22 21 00 ; Data Set #$3B: Write #$0000 to CGRAM (Pitchblack) $C0/01A5 23 21 00 ; Data Set #$3C: Window BG1/BG2 Mask Settings $C0/01A8 24 21 00 ; Data Set #$3D: Window BG3/BG4 Mask Settings $C0/01AB 25 21 00 ; Data Set #$3E: Window OBJ/MATH Mask Settings $C0/01AE 26 21 00 ; Data Set #$3F: Window 1 Left Position (X1) $C0/01B1 27 21 FF ; Data Set #$40: Window 1 Right Position (X2) $C0/01B4 28 21 00 ; Data Set #$41: Window 2 Left Position (X1) $C0/01B7 29 21 FF ; Data Set #$42: Window 2 Right Position (X2) $C0/01BA 2A 21 00 ; Data Set #$43: Window 1/2 Mask Logic (BG1-BG4) $C0/01BD 2B 21 00 ; Data Set #$44: Window 1/2 Mask Logic (OBJ/MATH) $C0/01C0 2C 21 00 ; Data Set #$45: Main Screen Designation $C0/01C3 2D 21 00 ; Data Set #$46: Main Screen Designation $C0/01C6 2E 21 00 ; Data Set #$47: Window Area Main Screen Disable $C0/01C9 2F 21 00 ; Data Set #$48: Window Area Sub Screen Disable $C0/01CC 30 21 00 ; Data Set #$49: Color Math Control Register A $C0/01CF 31 21 00 ; Data Set #$4A: Color Math Control Register B $C0/01D2 32 21 00 ; Data Set #$4B: Color Math Sub Screen Backdrop Color $C0/01D5 33 21 00 ; Data Set #$4C: Display Control 2 $C0/01D8 06 21 00 ; Data Set #$4D: Mosaic $C0/01DB 0A 01 00 ; Data Set #$4E: ? (Mosaic Buffer?)
$C0/01E7 NMI Handler
$C0/01E7 C2 30 REP #$30 ; Buffer Direct Bank, Direct Page and A/X/Y on stack $C0/01E9 8B PHB $C0/01EA 0B PHD $C0/01EB 48 PHA $C0/01EC DA PHX $C0/01ED 5A PHY $C0/01EE E2 30 SEP #$30 ; A/X/Y = 8 bit $C0/01F0 A9 82 LDA #$82 ; Set Direct Bank to $82 $C0/01F2 48 PHA $C0/01F3 AB PLB $C0/01F4 AD 10 42 LDA $4210 ; Remove NMI flag $C0/01F7 A5 A9 LDA $A9 ; Check General Update flag (are there updates to do?) $C0/01F9 F0 03 BEQ $03 ; [$01FE] Branch if there are updates to do $C0/01FB 4C 58 02 JMP $0258 ; Jump to the exit if not $C0/01FE A5 AA LDA $AA [$00:00AA] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/0200 F0 03 BEQ $03 [$0205] A:0400 X:0087 Y:0003 P:envMXdIZC
code is missing here
$C0/0205 A5 AB LDA $AB ; Has $2100 to be updated? $C0/0207 F0 0A BEQ $0A ; [$0213] Branch if not $C0/0209 A5 57 LDA $57 ; Load value for $2100 $C0/020B 8D 00 21 STA $2100 ; Set $2100 to it $C0/020E 8D 09 01 STA $0109 ; Store in buffer of current $2100 value $C0/0211 64 AB STZ $AB ; Remove $2100 update flag $C0/0213 A5 AC LDA $AC [$00:00AC] A:0480 X:0087 Y:0003 P:eNvMXdIzC $C0/0215 F0 0A BEQ $0A [$0221] A:0400 X:0087 Y:0003 P:envMXdIZC
code is missing here
$C0/0221 A5 AD LDA $AD ; Do the scroll registers have to be updated? $C0/0223 F0 03 BEQ $03 ; [$0228] Branch if not $C0/0225 20 D8 02 JSR $02D8 ; Update Scroll Registers $C0/0228 A5 AE LDA $AE [$00:00AE] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/022A F0 03 BEQ $03 [$022F] A:0400 X:0087 Y:0003 P:envMXdIZC
code is missing here
$C0/022F A5 AF LDA $AF [$00:00AF] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/0231 F0 03 BEQ $03 [$0236] A:0400 X:0087 Y:0003 P:envMXdIZC
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$C0/0236 E2 20 SEP #$20 A:0400 X:0087 Y:0003 P:envMXdIZC $C0/0238 A5 B0 LDA $B0 ; Set HDMA flags $C0/023A 8D 0C 42 STA $420C
sound related
$C0/023D A5 B1 LDA $B1 [$00:00B1] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/023F F0 03 BEQ $03 [$0244] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/0241 20 85 03 JSR $0385 [$C0:0385] A:8001 X:00FF Y:0003 P:envMXdIzC $C0/0244 A5 B2 LDA $B2 ; Flag set to update Joypad Input registers? $C0/0246 F0 06 BEQ $06 ; [$024E] Branch if not $C0/0248 20 FD 03 JSR $03FD ; Buffer Joypad Inputs $C0/024B 20 9D 09 JSR $099D [$C0:099D] A:0000 X:0004 Y:0000 P:envMXdIZC
code is missing here
$C0/024E A5 B3 LDA $B3 [$00:00B3] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/0250 F0 03 BEQ $03 [$0255] A:0400 X:0087 Y:0003 P:envMXdIZC
code is missing here
$C0/0255 20 18 04 JSR $0418 [$C0:0418] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/0258 E6 B4 INC $B4 ; Increment Frame Counter(?) $C0/025A C2 30 REP #$30 ; Restore Direct Bank, Direct Page and A/X/Y $C0/025C 7A PLY $C0/025D FA PLX $C0/025E 68 PLA $C0/025F 2B PLD $C0/0260 AB PLB $C0/0261 40 RTI
$C0/02D8 Update Scroll Registers
$C0/02D8 A5 61 LDA $61 ; Update BG1 H-Scroll Register $C0/02DA 8D 0D 21 STA $210D $C0/02DD A5 62 LDA $62 $C0/02DF 8D 0D 21 STA $210D $C0/02E2 A5 63 LDA $63 ; Update BG1 V-Scroll Register $C0/02E4 8D 0E 21 STA $210E $C0/02E7 A5 64 LDA $64 $C0/02E9 8D 0E 21 STA $210E $C0/02EC A5 65 LDA $65 ; Update BG2 H-Scroll Register $C0/02EE 8D 0F 21 STA $210F $C0/02F1 A5 66 LDA $66 $C0/02F3 8D 0F 21 STA $210F $C0/02F6 A5 67 LDA $67 ; Update BG2 V-Scroll Register $C0/02F8 8D 10 21 STA $2110 $C0/02FB A5 68 LDA $68 $C0/02FD 8D 10 21 STA $2110 $C0/0300 A5 69 LDA $69 ; Update BG3 H-Scroll Register $C0/0302 8D 11 21 STA $2111 $C0/0305 A5 6A LDA $6A $C0/0307 8D 11 21 STA $2111 $C0/030A A5 6B LDA $6B ; Update BG3 V-Scroll Register $C0/030C 8D 12 21 STA $2112 $C0/030F A5 6C LDA $6C $C0/0311 8D 12 21 STA $2112 $C0/0314 A5 6D LDA $6D ; Update BG4 H-Scroll Register $C0/0316 8D 13 21 STA $2113 $C0/0319 A5 6E LDA $6E $C0/031B 8D 13 21 STA $2113 $C0/031E A5 6F LDA $6F ; Update BG4 V-Scroll Register $C0/0320 8D 14 21 STA $2114 $C0/0323 A5 70 LDA $70 $C0/0325 8D 14 21 STA $2114 $C0/0328 64 AD STZ $AD ; Remove Flag for Scroll Register Update $C0/032A 60 RTS
$C0/0385 AE D0 01 LDX $01D0 [$82:01D0] A:8001 X:00FF Y:0003 P:envMXdIzC $C0/0388 EC CF 01 CPX $01CF [$82:01CF] A:8001 X:0000 Y:0003 P:envMXdIZC $C0/038B F0 16 BEQ $16 [$03A3] A:8001 X:0000 Y:0003 P:eNvMXdIzc $C0/038D BD 4E 01 LDA $014E,x[$82:014E] A:8001 X:0000 Y:0003 P:eNvMXdIzc $C0/0390 8D 40 21 STA $2140 [$82:2140] A:8002 X:0000 Y:0003 P:envMXdIzc $C0/0393 85 59 STA $59 [$00:0059] A:8002 X:0000 Y:0003 P:envMXdIzc $C0/0395 E8 INX A:8002 X:0000 Y:0003 P:envMXdIzc $C0/0396 8A TXA A:8002 X:0001 Y:0003 P:envMXdIzc $C0/0397 29 1F AND #$1F A:8001 X:0001 Y:0003 P:envMXdIzc $C0/0399 8D D0 01 STA $01D0 [$82:01D0] A:8001 X:0001 Y:0003 P:envMXdIzc $C0/039C A9 05 LDA #$05 A:8001 X:0001 Y:0003 P:envMXdIzc $C0/039E 8D CE 01 STA $01CE [$82:01CE] A:8005 X:0001 Y:0003 P:envMXdIzc $C0/03A1 80 45 BRA $45 ; [$03E8] Update APU register buffers
code is missing here
$C0/03E8 AD 40 21 LDA $2140 ; Update APU register buffers $C0/03EB 85 5D STA $5D $C0/03ED AD 41 21 LDA $2141 $C0/03F0 85 5E STA $5E $C0/03F2 AD 42 21 LDA $2142 $C0/03F5 85 5F STA $5F $C0/03F7 AD 43 21 LDA $2143 $C0/03FA 85 60 STA $60 $C0/03FC 60 RTS
$C0/03FD Buffer Joypad Inputs
$C0/03FD E2 30 SEP #$30 ; A/X/Y = 8 bit $C0/03FF AD 12 42 LDA $4212 ; Wait until Auto Joypad Read is done $C0/0402 29 01 AND #$01 $C0/0404 D0 F9 BNE $F9 ; [$03FF] $C0/0406 C2 20 REP #$20 ; A = 16 bit $C0/0408 A2 00 LDX #$00 ; Transfer Joypad Input into buffer registers at $7E-$81 $C0/040A BD 18 42 LDA $4218,x $C0/040D 95 7E STA $7E,x $C0/040F E8 INX $C0/0410 E8 INX $C0/0411 E0 04 CPX #$04 $C0/0413 D0 F5 BNE $F5 ; [$040A] $C0/0415 E2 20 SEP #$20 $C0/0417 60 RTS
$C0/0418 ?
$C0/0418 A5 BA LDA $BA [$00:00BA] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/041A F0 1C BEQ $1C [$0438] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/041C E6 BB INC $BB [$00:00BB] A:8001 X:0001 Y:0003 P:envMXdIzc $C0/041E A5 BB LDA $BB [$00:00BB] A:8001 X:0001 Y:0003 P:envMXdIzc $C0/0420 C9 01 CMP #$01 A:8001 X:0001 Y:0003 P:envMXdIzc $C0/0422 D0 14 BNE $14 [$0438] A:8001 X:0001 Y:0003 P:envMXdIZC $C0/0424 64 BB STZ $BB [$00:00BB] A:8001 X:0001 Y:0003 P:envMXdIZC $C0/0426 AD 09 01 LDA $0109 [$82:0109] A:8001 X:0001 Y:0003 P:envMXdIZC $C0/0429 18 CLC A:8000 X:0001 Y:0003 P:envMXdIZC $C0/042A 65 BD ADC $BD [$00:00BD] A:8000 X:0001 Y:0003 P:envMXdIZc $C0/042C 29 8F AND #$8F A:8001 X:0001 Y:0003 P:envMXdIzc $C0/042E 85 57 STA $57 [$00:0057] A:8001 X:0001 Y:0003 P:envMXdIzc $C0/0430 E6 AB INC $AB [$00:00AB] A:8001 X:0001 Y:0003 P:envMXdIzc $C0/0432 C6 BC DEC $BC [$00:00BC] A:8001 X:0001 Y:0003 P:envMXdIzc $C0/0434 D0 02 BNE $02 [$0438] A:8001 X:0001 Y:0003 P:envMXdIzc $C0/0436 64 BA STZ $BA [$00:00BA] A:800F X:0000 Y:0003 P:envMXdIZc $C0/0438 A5 B6 LDA $B6 [$00:00B6] A:0400 X:0087 Y:0003 P:envMXdIZC $C0/043A F0 1A BEQ $1A [$0456] A:0400 X:0087 Y:0003 P:envMXdIZC
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$C0/0456 60 RTS
$C0/0545 Execute General Updates while VBLANK
This activates NMI while VBLANK, sets the General Update flag and waits for the next VBLANK, so all the updates that were prepared are done. Afterwards, this subroutine clears the General Update flag (but does NOT deactivate NMI!).
$C0/0545 08 PHP ; Buffer Flag register and A on stack $C0/0546 C2 20 REP #$20 $C0/0548 48 PHA $C0/0549 E2 20 SEP #$20 $C0/054B A9 01 LDA #$01 ; Set General Update flag $C0/054D 85 A9 STA $A9 $C0/054F AD 08 01 LDA $0108 ; Activate NMI $C0/0552 09 80 ORA #$80 $C0/0554 8D 00 42 STA $4200 $C0/0557 8D 08 01 STA $0108 $C0/055A 20 9E 05 JSR $059E ; Wait for VBLANK $C0/055D 64 A9 STZ $A9 ; Remove General Update flag $C0/055F C2 20 REP #$20 ; Restore Flag register and A $C0/0561 68 PLA $C0/0562 28 PLP $C0/0563 60 RTS
$C0/0564 Deactivate NMI
$C0/0564 08 PHP ; Buffer Flag register and A on stack $C0/0565 C2 20 REP #$20 $C0/0567 48 PHA $C0/0568 E2 20 SEP #$20 $C0/056A AD 08 01 LDA $0108 ; Clear NMI flag from $4200 and its value buffer $0108 $C0/056D 29 7F AND #$7F $C0/056F 8D 00 42 STA $4200 $C0/0572 8D 08 01 STA $0108 $C0/0575 C2 20 REP #$20 ; Restore Flag register and A $C0/0577 68 PLA $C0/0578 28 PLP $C0/0579 60 RTS
$C0/057A Activate FBLANK
Note that this subroutine does not set the flag for an $2100 update.
$C0/057A 08 PHP ; Buffer Flag register and A on stack $C0/057B C2 20 REP #$20 $C0/057D 48 PHA $C0/057E E2 20 SEP #$20 ; This takes the value that currently is in $2100 ($0109) ... $C0/0580 AD 09 01 LDA $0109 ; ... sets the MSB and stores it in $57, which is the buffer for... $C0/0583 09 80 ORA #$80 ; ... the value to be transfered to $2100. This deactivates the FBLANK $C0/0585 85 57 STA $57 $C0/0587 C2 20 REP #$20 ; Restore Flag register and A $C0/0589 68 PLA $C0/058A 28 PLP $C0/058B 60 RTS
$C0/058C Deactivate FBLANK
Note that this subroutine does not set the flag for an $2100 update.
$C0/058C 08 PHP ; Buffer Flag register and A on stack $C0/058D C2 20 REP #$20 $C0/058F 48 PHA $C0/0590 E2 20 SEP #$20 ; This takes the value that currently is in $2100 ($0109) ... $C0/0592 AD 09 01 LDA $0109 ; ... removes the MSB and stores it in $57, which is the buffer for... $C0/0595 29 7F AND #$7F ; ... the value to be transfered to $2100. This deactivates the FBLANK $C0/0597 85 57 STA $57 $C0/0599 C2 20 REP #$20 ; Restore Flag register and A $C0/059B 68 PLA $C0/059C 28 PLP $C0/059D 60 RTS
$C0/059E Wait for VBLANK
This subroutine waits until the Frame Counter gets incremented (which happens in the NMI handler)
$C0/059E 08 PHP ; Buffer Flag register/A on stack $C0/059F C2 20 REP #$20 $C0/05A1 48 PHA $C0/05A2 E2 20 SEP #$20 $C0/05A4 A5 B4 LDA $B4 $C0/05A6 C5 B4 CMP $B4 $C0/05A8 F0 FC BEQ $FC ; [$05A6] Loop until the Frame Counter has incremented $C0/05AA C2 20 REP #$20 ; Restore Flag register/A $C0/05AC 68 PLA $C0/05AD 28 PLP $C0/05AE 60 RTS
$C0/05EA Which buttons were pushed this frame?
This subroutine determines which buttons were pushed in this frame
$C0/05EA 08 PHP ; Buffer Flag register/A/X on stack $C0/05EB C2 30 REP #$30 $C0/05ED 48 PHA $C0/05EE DA PHX $C0/05EF E2 10 SEP #$10 ; X/Y = 8 bit $C0/05F1 A2 00 LDX #$00 ; Setup Loop Counter / Index $C0/05F3 B5 7E LDA $7E,x ; Load buffered raw Joypad Input of this frame $C0/05F5 55 82 EOR $82,x ; ($82,x contains the raw Joypad Input of last frame) $C0/05F7 35 7E AND $7E,x $C0/05F9 95 86 STA $86,x ; $86,x contains now every button that was pushed in this frame (not held!) $C0/05FB B5 7E LDA $7E,x ; Transfer this frames input in buffer for last frame's input $C0/05FD 95 82 STA $82,x $C0/05FF 74 7E STZ $7E,x ; After this, clear this frame's buffer $C0/0601 E8 INX ; Increment loop counter $C0/0602 E8 INX $C0/0603 E0 04 CPX #$04 $C0/0605 D0 EC BNE $EC ; [$05F3] Repeat this for the second controller, too $C0/0607 C2 30 REP #$30 $C0/0609 FA PLX ; Restore Flag register/A/X $C0/060A 68 PLA $C0/060B 28 PLP $C0/060C 60 RTS
$C0/07C5 Tool: Set values of a number of registers
This subroutine is useful if you have a number of single byte values that you want to store in registers that are scattered on the same bank. It works off a number of "data sets". These sets consist of three bytes: two bytes address on that particular bank and the value for it. Can be used for WRAM addresses or Registers.
The bytes after the Jump Command to this subroutine are the data for this subroutine:
1st byte: Bank for 24-bit Load address (address of the data sets) 2nd byte: Address Low Byte for 24-bit Load address 3rd byte: Address High Byte for 24-bit Load address 4th byte: Bank for 24-bit Store address (Bank on which the store addresses are) 5th byte: Number of data sets to do, Low Byte 6th byte: Number of data sets to do, High Byte
Please take care that the 24-bit address is not in order: Bank, Low Byte, High Byte.
$C0/07C5 08 PHP ; Buffer Flag register/A/X/Y on stack $C0/07C6 C2 30 REP #$30 $C0/07C8 48 PHA $C0/07C9 DA PHX $C0/07CA 5A PHY $C0/07CB E2 20 SEP #$20 ; A = 8 bit (X/Y = 16 bit) $C0/07CD BA TSX ; Load Return Address from Stack $C0/07CE B5 08 LDA $08,x $C0/07D0 85 00 STA $00 ; Store original Return Address in $00 as 24-bit Load Address $C0/07D2 18 CLC ; Add #$06 to Return Address and store it back on stack $C0/07D3 69 06 ADC #$06 ; (This way, the bytes following the Jump Command are left out) $C0/07D5 95 08 STA $08,x ; (These bytes are data for this subroutine) $C0/07D7 B5 09 LDA $09,x ; Load upper byte of the Return Address from Stack $C0/07D9 85 01 STA $01 ; Store it in $01 as 24-bit Load Address $C0/07DB 69 00 ADC #$00 ; Add Carry (if set) $C0/07DD 95 09 STA $09,x ; Store back for new Return Address $C0/07DF B5 0A LDA $0A,x ; Load Return Address Bank in $02 as 24-bit Load Address $C0/07E1 85 02 STA $02 $C0/07E3 E2 10 SEP #$10 ; Build an 24-bit load address in $03 out of the first three data bytes $C0/07E5 A0 01 LDY #$01 $C0/07E7 B7 00 LDA [$00],y $C0/07E9 85 05 STA $05 $C0/07EB C8 INY $C0/07EC C2 20 REP #$20 $C0/07EE B7 00 LDA [$00],y $C0/07F0 85 03 STA $03 $C0/07F2 C8 INY $C0/07F3 C8 INY $C0/07F4 E2 20 SEP #$20 ; 4th data byte is used as Bank of the 24-bit Store Address in $06-$08 $C0/07F6 B7 00 LDA [$00],y $C0/07F8 85 08 STA $08 $C0/07FA C8 INY $C0/07FB C2 20 REP #$20 ; Next double-byte is loaded and multiplied by 3 $C0/07FD B7 00 LDA [$00],y ; (It's the number of data sets to do. Each data set is 3 bytes in size) $C0/07FF 0A ASL A ; (This way, the number of bytes is stored in $09/$0A) $C0/0800 18 CLC ; (It is used as a Compare Value for the Store Index later) $C0/0801 77 00 ADC [$00],y $C0/0803 85 09 STA $09 $C0/0805 C2 10 REP #$10 ; X/Y = 16 bit (A already is 16 bit) $C0/0807 A0 00 00 LDY #$0000 ; Setup Load Index $C0/080A C2 20 REP #$20 ; A = 16 bit (this is part of a loop, so it's not unnecessary) $C0/080C B7 03 LDA [$03],y ; Load first double-byte of data set $C0/080E 85 06 STA $06 ; Store as part of the 24-bit Store Address $C0/0810 C8 INY ; Increment Load Index twice $C0/0811 C8 INY $C0/0812 E2 20 SEP #$20 ; Transfer data set value to its destination $C0/0814 B7 03 LDA [$03],y $C0/0816 87 06 STA [$06] $C0/0818 C8 INY ; Increment Load Index $C0/0819 C4 09 CPY $09 ; Does the Load Index have reached its limit? $C0/081B D0 ED BNE $ED ; [$080A] Loop if not $C0/081D C2 20 REP #$20 ; Restore Flag register/A/X/Y $C0/081F 7A PLY $C0/0820 FA PLX $C0/0821 68 PLA $C0/0822 28 PLP $C0/0823 6B RTL
$C0/0824 Setup DMA
This subroutine sets up an DMA. The bytes after the Jump Command to this subroutine are the data for this subroutine:
1st byte: No. of the DMA channel to use (0-7) 2nd byte: $43x0 - DMA Settings 3rd byte: $43x1 - I/O-Bus address ($21xx) 4th byte: $43x4 - Bank 5th byte: $43x2 - Address - Low Byte 6th byte: $43x3 - Address - High Byte 7th byte: $43x5 - Number of Bytes to transfer - Low Byte 8th byte: $43x6 - Number of Bytes to transfer - High Byte
This subroutine does not change A/X/Y
$C0/0824 08 PHP ; Buffer Flag register/A/X/Y on stack $C0/0825 C2 30 REP #$30 $C0/0827 48 PHA $C0/0828 DA PHX $C0/0829 5A PHY $C0/082A E2 20 SEP #$20 ; A = 8 bit (X/Y = 16 bit) $C0/082C BA TSX ; Load Return Address from Stack $C0/082D B5 08 LDA $08,x $C0/082F 85 00 STA $00 ; Store original Return Address in $00 as 24-bit Load Address $C0/0831 18 CLC ; Add #$08 to Return Address and store it back on stack $C0/0832 69 08 ADC #$08 ; (This way, the bytes following the Jump Command are left out) $C0/0834 95 08 STA $08,x ; (These bytes are data for this subroutine) $C0/0836 B5 09 LDA $09,x ; Load upper byte of the Return Address from Stack $C0/0838 85 01 STA $01 ; Store it in $01 as 24-bit Load Address $C0/083A 69 00 ADC #$00 ; Add Carry (if set) $C0/083C 95 09 STA $09,x ; Store back for new Return Address $C0/083E B5 0A LDA $0A,x ; Load Return Address Bank in $02 as 24-bit Load Address $C0/0840 85 02 STA $02 $C0/0842 E2 10 SEP #$10 ; X/Y = 8 bit $C0/0844 A0 01 LDY #$01 ; Use Y as Load Counter $C0/0846 B7 00 LDA [$00],y ; Load 1st byte (No. of the DMA Channel to use) $C0/0848 0A ASL A ; No. * #$10 = Store Index $C0/0849 0A ASL A $C0/084A 0A ASL A $C0/084B 0A ASL A $C0/084C AA TAX ; Transfer Store Index in X $C0/084D C8 INY ; Increment Load Index $C0/084E B7 00 LDA [$00],y ; Load 2nd byte $C0/0850 9D 00 43 STA $4300,x ; Set as DMA Settings $C0/0853 C8 INY ; Increment Load Index $C0/0854 B7 00 LDA [$00],y ; Load 3rd byte $C0/0856 9D 01 43 STA $4301,x ; Set as $21xx address $C0/0859 C8 INY ; Increment Load Index $C0/085A B7 00 LDA [$00],y ; Load 4th byte $C0/085C 9D 04 43 STA $4304,x ; Set as Bank $C0/085F C8 INY ; Increment Load Index $C0/0860 B7 00 LDA [$00],y ; Load 5th byte $C0/0862 9D 02 43 STA $4302,x ; Set as address Low Byte $C0/0865 C8 INY ; Increment Load Index $C0/0866 B7 00 LDA [$00],y ; Load 6th byte $C0/0868 9D 03 43 STA $4303,x ; Set as address High Byte $C0/086B C8 INY ; Increment Load Index $C0/086C B7 00 LDA [$00],y ; Load 7th byte $C0/086E 9D 05 43 STA $4305,x ; Set as DMA Size Low Byte $C0/0871 C8 INY ; Increment Load Index $C0/0872 B7 00 LDA [$00],y ; Load 8th byte $C0/0874 9D 06 43 STA $4306,x ; Set as DMA Size High Byte $C0/0877 C2 30 REP #$30 ; Restore Flag register/A/X/Y $C0/0879 7A PLY $C0/087A FA PLX $C0/087B 68 PLA $C0/087C 28 PLP $C0/087D 6B RTL
$C0/0D0D ?
$C0/0D0D E2 20 SEP #$20 A:1201 X:0000 Y:0003 P:envMXdizc $C0/0D0F AD 07 01 LDA $0107 [$82:0107] A:1201 X:0000 Y:0003 P:envMXdizc $C0/0D12 9C 07 01 STZ $0107 [$82:0107] A:1200 X:0000 Y:0003 P:envMXdiZc $C0/0D15 F0 0E BEQ $0E [$0D25] A:1200 X:0000 Y:0003 P:envMXdiZc
code is missing here
$C0/0D25 E2 20 SEP #$20 ; A = 8 bit $C0/0D27 C2 10 REP #$10 ; X/Y = 16 bit $C0/0D29 A5 5D LDA $5D [$00:005D] A:1200 X:0000 Y:0003 P:envMxdiZc $C0/0D2B 29 7F AND #$7F A:1200 X:0000 Y:0003 P:envMxdiZc $C0/0D2D C9 02 CMP #$02 A:1200 X:0000 Y:0003 P:envMxdiZc $C0/0D2F F0 06 BEQ $06 [$0D37] A:1200 X:0000 Y:0003 P:eNvMxdizc $C0/0D31 20 E5 0A JSR $0AE5 [$C0:0AE5] A:1200 X:0000 Y:0003 P:eNvMxdizc $C0/0D34 20 95 0C JSR $0C95 [$C0:0C95] A:12FF X:0087 Y:0003 P:eNvMxdizc $C0/0D37 9C E4 01 STZ $01E4 [$82:01E4] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D3A 9C E5 01 STZ $01E5 [$82:01E5] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D3D 64 AA STZ $AA ; Clear Flag $C0/0D3F 64 AB STZ $AB ; Clear $2100 Update Flag $C0/0D41 64 AC STZ $AC ; Clear Flag $C0/0D43 64 AD STZ $AD ; Clear Scroll Register Update Flag $C0/0D45 64 AE STZ $AE ; Clear Flag $C0/0D47 64 AF STZ $AF ; Clear Flag $C0/0D49 64 B0 STZ $B0 ; Clear $420C buffer (HDMA flags) $C0/0D4B 64 B1 STZ $B1 ; Clear Flag $C0/0D4D 64 B2 STZ $B2 ; Clear Joypad Input Flag $C0/0D4F 64 B3 STZ $B3 ; Clear Flag $C0/0D51 9C 0E 01 STZ $010E [$82:010E] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D54 9C 12 01 STZ $0112 [$82:0112] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D57 9C 16 01 STZ $0116 [$82:0116] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D5A 9C 1A 01 STZ $011A [$82:011A] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D5D 9C 1E 01 STZ $011E [$82:011E] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D60 9C 22 01 STZ $0122 [$82:0122] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D63 9C 26 01 STZ $0126 [$82:0126] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D66 9C 2A 01 STZ $012A [$82:012A] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D69 9C 2E 01 STZ $012E [$82:012E] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D6C 9C 32 01 STZ $0132 [$82:0132] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D6F 9C 36 01 STZ $0136 [$82:0136] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D72 9C 3A 01 STZ $013A [$82:013A] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D75 9C 3E 01 STZ $013E [$82:013E] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D78 9C 42 01 STZ $0142 [$82:0142] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D7B 9C 46 01 STZ $0146 [$82:0146] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D7E 9C 4A 01 STZ $014A [$82:014A] A:0402 X:0087 Y:0003 P:eNvMxdizc $C0/0D81 20 45 05 JSR $0545 ; Execute General Updates while VBLANK $C0/0D84 20 7A 05 JSR $057A ; Activate FBLANK $C0/0D87 A5 57 LDA $57 ; FBLANK after next VBLANK $C0/0D89 29 80 AND #$80 $C0/0D8B 85 57 STA $57 $C0/0D8D E6 AB INC $AB ; Set $2100 Update flag (for FBLANK) $C0/0D8F 20 9E 05 JSR $059E ; Wait for VBLANK $C0/0D92 20 64 05 JSR $0564 ; Deactivate NMI $C0/0D95 AD 08 01 LDA $0108 ; Deactivate NMI $C0/0D98 29 CF AND #$CF $C0/0D9A 8D 00 42 STA $4200 $C0/0D9D 8D 08 01 STA $0108 $C0/0DA0 22 C5 07 C0 JSL $C007C5 ; Set values of a number of registers
Arguments: $C0/0DA4 C0 91 32 00 17 00 ; Transfer #$17 data sets from $C0/3291
$C0/0DAA 20 01 4B JSR $4B01 [$C0:4B01] A:0401 X:0087 Y:0003 P:envMxdizc $C0/0DAD 20 13 83 JSR $8313 [$C0:8313] A:0401 X:0087 Y:0003 P:envMxdizc $C0/0DB0 A9 30 LDA #$30 A:8082 X:FFFF Y:0003 P:eNvMxdizc $C0/0DB2 8D DC 01 STA $01DC [$82:01DC] A:8030 X:FFFF Y:0003 P:envMxdizc $C0/0DB5 A9 E2 LDA #$E2 A:8030 X:FFFF Y:0003 P:envMxdizc $C0/0DB7 8D DD 01 STA $01DD [$82:01DD] A:80E2 X:FFFF Y:0003 P:eNvMxdizc $C0/0DBA A9 DF LDA #$DF A:80E2 X:FFFF Y:0003 P:eNvMxdizc $C0/0DBC 8D DE 01 STA $01DE [$82:01DE] A:80DF X:FFFF Y:0003 P:eNvMxdizc $C0/0DBF 20 37 EB JSR $EB37 [$C0:EB37] A:80DF X:FFFF Y:0003 P:eNvMxdizc $C0/0DC2 A9 00 LDA #$00 ; CGRAM write address $C0/0DC4 8D 21 21 STA $2121 $C0/0DC7 22 24 08 C0 JSL $C00824 ; Setup DMA - Clear whole CGRAM
Arguments: $C0/0DCB 00 02 22 7F 00 00 00 02 ; DMA channel 0, to CGRAM, from $7F0000, 200 Byte
$C0/0DD3 A9 01 LDA #$01 ; Activate DMA $C0/0DD5 8D 0B 42 STA $420B $C0/0DD8 A9 80 LDA #$80 ; VRAM Transfer Settings: 16-bit Transfer $C0/0DDA 8D 15 21 STA $2115 $C0/0DDD A9 00 LDA #$00 ; VRAM Destination: $2000 $C0/0DDF 8D 16 21 STA $2116 $C0/0DE2 A9 20 LDA #$20 $C0/0DE4 8D 17 21 STA $2117 $C0/0DE7 A9 00 LDA #$00 A:8020 X:FFFF Y:0003 P:envMxdizc $C0/0DE9 8D DC 01 STA $01DC [$82:01DC] A:8000 X:FFFF Y:0003 P:envMxdiZc $C0/0DEC A9 00 LDA #$00 A:8000 X:FFFF Y:0003 P:envMxdiZc $C0/0DEE 8D DD 01 STA $01DD [$82:01DD] A:8000 X:FFFF Y:0003 P:envMxdiZc $C0/0DF1 A9 D0 LDA #$D0 A:8000 X:FFFF Y:0003 P:envMxdiZc $C0/0DF3 8D DE 01 STA $01DE [$82:01DE] A:80D0 X:FFFF Y:0003 P:eNvMxdizc $C0/0DF6 20 37 EB JSR $EB37 [$C0:EB37] A:80D0 X:FFFF Y:0003 P:eNvMxdizc $C0/0DF9 22 24 08 C0 JSL $C00824 ; Setup DMA - Clear whole VRAM
Arguments: $C0/0DFD 00 01 18 7F 00 00 00 80 ; Single Byte DMA, channel 0, to VRAM, from $7F/0000, #$8000 Bytes
$C0/0E05 A9 01 LDA #$01 ; Activate DMA $C0/0E07 8D 0B 42 STA $420B $C0/0E0A A9 4F LDA #$4F A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E0C 8D DC 01 STA $01DC [$82:01DC] A:804F X:FFFF Y:0003 P:envMxdizc $C0/0E0F A9 F4 LDA #$F4 A:804F X:FFFF Y:0003 P:envMxdizc $C0/0E11 8D DD 01 STA $01DD [$82:01DD] A:80F4 X:FFFF Y:0003 P:eNvMxdizc $C0/0E14 A9 DA LDA #$DA A:80F4 X:FFFF Y:0003 P:eNvMxdizc $C0/0E16 8D DE 01 STA $01DE [$82:01DE] A:80DA X:FFFF Y:0003 P:eNvMxdizc $C0/0E19 20 37 EB JSR $EB37 [$C0:EB37] A:80DA X:FFFF Y:0003 P:eNvMxdizc $C0/0E1C A9 00 LDA #$00 ; Set VRAM Address to $6000 $C0/0E1E 8D 16 21 STA $2116 $C0/0E21 A9 60 LDA #$60 $C0/0E23 8D 17 21 STA $2117 $C0/0E26 22 24 08 C0 JSL $C00824 ; Setup DMA
Arguments: $C0/0DFD 00 01 18 7F 00 00 00 08 ; Single Byte DMA, channel 0, to VRAM, from $7F/0000, #$0800 Bytes
$C0/0E32 A9 01 LDA #$01 ; Activate DMA $C0/0E34 8D 0B 42 STA $420B $C0/0E37 E2 20 SEP #$20 A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E39 A5 5D LDA $5D [$00:005D] A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E3B 29 7F AND #$7F A:8000 X:FFFF Y:0003 P:envMxdiZc $C0/0E3D C9 02 CMP #$02 A:8000 X:FFFF Y:0003 P:envMxdiZc $C0/0E3F F0 09 BEQ $09 [$0E4A] A:8000 X:FFFF Y:0003 P:eNvMxdizc $C0/0E41 A9 02 LDA #$02 A:8000 X:FFFF Y:0003 P:eNvMxdizc $C0/0E43 85 4C STA $4C [$00:004C] A:8002 X:FFFF Y:0003 P:envMxdizc $C0/0E45 64 4B STZ $4B [$00:004B] A:8002 X:FFFF Y:0003 P:envMxdizc $C0/0E47 20 7C 0A JSR $0A7C [$C0:0A7C] A:8002 X:FFFF Y:0003 P:envMxdizc $C0/0E4A A9 01 LDA #$01 A:8002 X:FFFF Y:0003 P:envMxdizc $C0/0E4C 8D 2C 21 STA $212C [$82:212C] A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E4F 20 46 07 JSR $0746 [$C0:0746] A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E52 20 8C 05 JSR $058C ; Deactivate the FBLANK $C0/0E55 20 45 05 JSR $0545 ; Execute General Updates while VBLANK $C0/0E58 20 AE 07 JSR $07AE [$C0:07AE] A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E5B 9C D5 02 STZ $02D5 [$82:02D5] A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E5E A9 0E LDA #$0E A:8001 X:FFFF Y:0003 P:envMxdizc $C0/0E60 8D D6 02 STA $02D6 [$82:02D6] A:800E X:FFFF Y:0003 P:envMxdizc $C0/0E63 A0 40 00 LDY #$0040 ; Wait for 40 frames $C0/0E66 20 9E 05 JSR $059E ; Wait for VBLANK $C0/0E69 C0 00 00 CPY #$0000 $C0/0E6C F0 03 BEQ $03 ; [$0E71] Branch if Frame Counter has run out $C0/0E6E 88 DEY ; If not, decrement Frame Counter and Loop $C0/0E6F 80 F5 BRA $F5 ; [$0E66] $C0/0E71 C2 20 REP #$20 A:800E X:FFFF Y:0000 P:envMxdiZC $C0/0E73 CE D5 02 DEC $02D5 [$82:02D5] A:800E X:FFFF Y:0000 P:envmxdiZC $C0/0E76 D0 1D BNE $1D [$0E95] A:800E X:FFFF Y:0000 P:envmxdizC $C0/0E78 20 54 07 JSR $0754 [$C0:0754] A:8000 X:FFFF Y:0000 P:envmxdiZC $C0/0E7B 20 AE 07 JSR $07AE [$C0:07AE] A:8000 X:FFFF Y:0000 P:envmxdiZC $C0/0E7E 20 2F 09 JSR $092F [$C0:092F] A:8000 X:FFFF Y:0000 P:envmxdiZC $C0/0E81 29 07 00 AND #$0007 A:80B5 X:FFFF Y:0000 P:envmxdiZC $C0/0E84 0A ASL A A:0005 X:FFFF Y:0000 P:envmxdizC $C0/0E85 AA TAX A:000A X:FFFF Y:0000 P:envmxdizc $C0/0E86 BF C8 0E C0 LDA $C00EC8,x[$C0:0ED2] A:000A X:000A Y:0000 P:envmxdizc $C0/0E8A 85 C6 STA $C6 [$00:00C6] A:2C7D X:000A Y:0000 P:envmxdizc $C0/0E8C E2 20 SEP #$20 A:2C7D X:000A Y:0000 P:envmxdizc $C0/0E8E A9 C2 LDA #$C2 A:2C7D X:000A Y:0000 P:envMxdizc $C0/0E90 85 C8 STA $C8 [$00:00C8] A:2CC2 X:000A Y:0000 P:eNvMxdizc $C0/0E92 4C 72 87 JMP $8772 [$C0:8772] A:2CC2 X:000A Y:0000 P:eNvMxdizc $C0/0E95 E2 20 SEP #$20 A:800E X:FFFF Y:0000 P:envmxdizC $C0/0E97 A9 01 LDA #$01 ; Set flag to Update the Joypad Input buffers $C0/0E99 85 B2 STA $B2 $C0/0E9B 20 EA 05 JSR $05EA ; Which buttons were pushed this frame? $C0/0E9E 20 0D 06 JSR $060D [$C0:060D] A:8001 X:FFFF Y:0000 P:envMxdizC $C0/0EA1 20 2F 09 JSR $092F [$C0:092F] A:8001 X:FFFF Y:0000 P:envMxdizC $C0/0EA4 20 9E 05 JSR $059E ; Wait for VBLANK $C0/0EA7 A5 A2 LDA $A2 [$00:00A2] A:80BF X:FFFF Y:0000 P:envMxdizC $C0/0EA9 05 A3 ORA $A3 [$00:00A3] A:8000 X:FFFF Y:0000 P:envMxdiZC $C0/0EAB F0 C4 BEQ $C4 [$0E71] A:8000 X:FFFF Y:0000 P:envMxdiZC
$C0/3291 ? (Data)
Graphic settings, executed in $C0/0D0D
$C0/3291 0B 42 00 ; Data Set #$01: Deactivate DMAs $C0/3294 0C 42 00 ; Data Set #$02: Deactivate HDMAs $C0/3297 01 21 00 ; Data Set #$03: $C0/329A 02 21 00 ; Data Set #$04: $C0/329D 03 21 80 ; Data Set #$05: $C0/32A0 05 21 01 ; Data Set #$06: $C0/32A3 07 21 60 ; Data Set #$07: $C0/32A6 08 21 70 ; Data Set #$08: $C0/32A9 0B 21 42 ; Data Set #$09: $C0/32AC 0C 21 88 ; Data Set #$0A: $C0/32AF 0D 21 00 ; Data Set #$0B: $C0/32B2 0D 21 00 ; Data Set #$0C: $C0/32B5 0E 21 00 ; Data Set #$0D: $C0/32B8 0E 21 00 ; Data Set #$0E: $C0/32BB 0F 21 00 ; Data Set #$0F: $C0/32BE 0F 21 00 ; Data Set #$10: $C0/32C1 10 21 00 ; Data Set #$11: $C0/32C4 10 21 00 ; Data Set #$12: $C0/32C7 11 21 00 ; Data Set #$13: $C0/32CA 11 21 00 ; Data Set #$14: $C0/32CD 12 21 00 ; Data Set #$15: $C0/32D0 12 21 00 ; Data Set #$16: $C0/32D3 2C 21 03 ; Data Set #$17:
$C0/3291 ? (Data)
$C0/32D6 0B 42 00 $C0/32D9 0C 42 00 $C0/32DC 01 21 00 $C0/32DF 02 21 00 $C0/32E2 03 21 80 $C0/32E5 05 21 09 $C0/32E8 06 21 00 $C0/32EB 07 21 6C $C0/32EE 08 21 70 $C0/32F1 09 21 74 $C0/32F4 0B 21 33 $C0/32F7 0C 21 82 $C0/32FA 0D 21 00
$C0/4B01 ? (Clear WRAM from $7E/0237 onwards)
$C0/4B01 08 PHP ; Buffer Flag register $C0/4B02 E2 20 SEP #$20 ; A = 8 bit $C0/4B04 C2 10 REP #$10 ; X/Y = 16 bit $C0/4B06 A9 37 LDA #$37 ; Set WRAM write address to $7E/0237 $C0/4B08 8D 81 21 STA $2181 $C0/4B0B A9 02 LDA #$02 $C0/4B0D 8D 82 21 STA $2182 $C0/4B10 A9 7E LDA #$7E $C0/4B12 8D 83 21 STA $2183 $C0/4B15 22 24 08 C0 JSL $C00824 ; Setup DMA
Arguments: $C0/0DFD 00 08 80 C0 28 4B CD 12 ; Fixed DMA, channel 0, to WRAM, from $C0/4B28, #$12CD Bytes
$C0/4B21 A9 01 LDA #$01 ; Activate DMA $C0/4B23 8D 0B 42 STA $420B $C0/4B26 28 PLP ; Restore Flag register $C0/4B27 60 RTS
$C0/4B28 00 00 ; Clear Bytes for DMA
$C0/EB37 ?
This subroutine decompresses (graphic) data to $7F/0000. There are flags that show if the compressed data can be transfered to $7F/0000 without editing (flag set) or if something of the already decompressed data can be repeated (flag cleared).
It uses several registers:
$0F - "Primary Data Load" Address Low Byte - points to general data at first, later to the compressed data $10 - "Primary Data Load" Address High Byte - points to general data at first, later to the compressed data $11 - "Primary Data Load" Address Bank - points to general data at first, later to the compressed data $12 - Size of the decompressed data (number of bytes to do), Low Byte $13 - Size of the decompressed data (number of bytes to do), High Byte
$15 - "Secondary Data Load" Address Low Byte - points to the decompression flags $16 - "Secondary Data Load" Address High Byte - points to the decompression flags $17 - "Secondary Data Load" Address Bank - points to the decompression flags $18 - Counter of how many decompression flags already have been worked off (valid values: 0-7) $19 - Buffer of the decompression flags, MSB gets worked off first, LSB last
Before this subroutine is executed, there has to be a 24-bit address set in $01DC-$01DE that points to the data for this subroutine. This data is structured as follows:
1st byte: Size of the decompressed data (number of bytes to do), Low Byte 2nd byte: Size of the decompressed data (number of bytes to do), High Byte 3rd byte: Offset between decompression flags and compressed data - Low Byte 4th byte: Offset between decompression flags and compressed data - High Byte
$C0/EB37 08 PHP ; Buffer Flag register, A/X/Y and Direct Bank on stack $C0/EB38 C2 30 REP #$30 $C0/EB3A 48 PHA $C0/EB3B DA PHX $C0/EB3C 5A PHY $C0/EB3D 8B PHB $C0/EB3E E2 20 SEP #$20 ; Rebuild the brought-in address from $01DC-E in $0F-$11 $C0/EB40 AD DE 01 LDA $01DE ; ($0F-$10 will always be #$0000, the address on the bank is in Y ... $C0/EB43 85 11 STA $11 ; (... and both will be combined in Indexed Loading, see below) $C0/EB45 85 17 STA $17 ; Bank is stored in $17 (for the secondary 24-bit address) $C0/EB47 C2 20 REP #$20 ; A = 16 bit $C0/EB49 AC DC 01 LDY $01DC ; Finish setting up the Address in $0F-$11 + Y $C0/EB4C 64 0F STZ $0F $C0/EB4E 9C DF 01 STZ $01DF [$82:01DF] A:80DF X:FFFF Y:E230 P:eNvmxdizc $C0/EB51 B7 0F LDA [$0F],y ; Load first data double-byte (Decomp. data size = number of bytes to do) $C0/EB53 85 12 STA $12 ; Store it in $12 $C0/EB55 8D E2 01 STA $01E2 [$82:01E2] A:0200 X:FFFF Y:E230 P:envmxdizc $C0/EB58 C8 INY ; Increment Load Index twice $C0/EB59 C8 INY $C0/EB5A B7 0F LDA [$0F],y ; Load next data double-byte $C0/EB5C 85 0F STA $0F ; Store in $0F as new offset of the Data Load Address $C0/EB5E C8 INY ; Increment Load Index twice $C0/EB5F C8 INY $C0/EB60 84 15 STY $15 ; Store Index (i. e. the Address without offset) in $15/6 for 24-bit Address $C0/EB62 9C 81 21 STZ $2181 ; WRAM I/O Address: $0000 (on bank $7F, see below) $C0/EB65 64 1E STZ $1E [$00:001E] A:000D X:FFFF Y:E234 P:eNvmxdizc $C0/EB67 64 21 STZ $21 [$00:0021] A:000D X:FFFF Y:E234 P:eNvmxdizc $C0/EB69 64 18 STZ $18 ; Clear counter for worked off decompression flags $C0/EB6B E2 20 SEP #$20 ; Set #$7F as Direct Bank and as WRAM I/O Address bank ($2183) $C0/EB6D A9 7F LDA #$7F $C0/EB6F 48 PHA $C0/EB70 8D 83 21 STA $2183 $C0/EB73 AB PLB $C0/EB74 4C B5 EB JMP $EBB5 [$C0:EBB5] A:007F X:FFFF Y:E234 P:envMxdizc
$C0/EB77 ?
$C0/EB77 08 PHP ; Buffer Flag register, A/X/Y and Direct Bank on stack $C0/EB78 C2 30 REP #$30 $C0/EB7A 48 PHA $C0/EB7B DA PHX $C0/EB7C 5A PHY $C0/EB7D 8B PHB $C0/EB7E E2 20 SEP #$20 ; Rebuild the brought-in address from $01DC-E in $0F-$11 $C0/EB80 AD DE 01 LDA $01DE ; ($0F-$10 will always be #$0000, the address on the bank is in Y ... $C0/EB83 85 11 STA $11 ; (... and both will be combined in Indexed Loading, see below) $C0/EB85 85 17 STA $17 ; Bank is stored in $17 (for the secondary 24-bit address) $C0/EB87 C2 20 REP #$20 ; A = 16 bit $C0/EB89 AC DC 01 LDY $01DC ; Finish setting up the Address in $0F-$11 + Y $C0/EB8C 64 0F STZ $0F $C0/EB8E B7 0F LDA [$0F],y ; Load first data double-byte (Decomp. data size = number of bytes to do) $C0/EB90 85 12 STA $12 ; Store it in $12 $C0/EB92 8D E2 01 STA $01E2 [$82:01E2] A:02C0 X:FFFF Y:CA1B P:envmxdizc $C0/EB95 C8 INY ; Increment Load Index twice $C0/EB96 C8 INY $C0/EB97 B7 0F LDA [$0F],y ; Load next data double-byte $C0/EB99 85 0F STA $0F ; Store in $0F as new offset of the Data Load Address $C0/EB9B C8 INY ; Increment Load Index twice $C0/EB9C C8 INY $C0/EB9D 84 15 STY $15 ; Store Index (i. e. the Address without offset) in $15/6 for 24-bit Address $C0/EB9F AD DF 01 LDA $01DF [$82:01DF] A:002C X:FFFF Y:CA1F P:eNvmxdizc $C0/EBA2 8D 81 21 STA $2181 [$82:2181] A:02C0 X:FFFF Y:CA1F P:envmxdizc $C0/EBA5 64 1E STZ $1E [$00:001E] A:02C0 X:FFFF Y:CA1F P:envmxdizc $C0/EBA7 64 21 STZ $21 [$00:0021] A:02C0 X:FFFF Y:CA1F P:envmxdizc $C0/EBA9 64 18 STZ $18 ; Clear counter for worked off decompression flags $C0/EBAB E2 20 SEP #$20 ; Set $7F as Direct Bank and as WRAM I/O Address bank ($2183) $C0/EBAD AD E1 01 LDA $01E1 [$82:01E1] A:02C0 X:FFFF Y:CA1F P:envMxdizc $C0/EBB0 48 PHA A:027F X:FFFF Y:CA1F P:envMxdizc $C0/EBB1 8D 83 21 STA $2183 [$82:2183] A:027F X:FFFF Y:CA1F P:envMxdizc $C0/EBB4 AB PLB A:027F X:FFFF Y:CA1F P:envMxdizc
$C0/EBB5 Graphics Decompression
These are the "guts" of the graphics decompression. This is executed through one of the two preparation subroutines right above.
See the description at $C0/EB37 or $C0/EB77 for more detail
$C0/EBB5 A2 00 00 LDX #$0000 A:007F X:FFFF Y:E234 P:envMxdizc $C0/EBB8 80 0C BRA $0C [$EBC6] A:007F X:0000 Y:E234 P:envMxdiZc $C0/EBBA E2 20 SEP #$20 ; Remove worked off flag from decompression flag buffer $C0/EBBC 06 19 ASL $19 $C0/EBBE E6 18 INC $18 ; Increment counter of worked off flags $C0/EBC0 A9 07 LDA #$07 ; Have 8 flags been worked off? $C0/EBC2 25 18 AND $18 $C0/EBC4 D0 0A BNE $0A ; [$EBD0] Branch if not, else: load next flag value into buffer $C0/EBC6 A7 15 LDA [$15] ; Load next decompression flag byte from data and store it in $19 $C0/EBC8 85 19 STA $19 $C0/EBCA C2 20 REP #$20 ; 16-bit INC secondary Load Address after loading $C0/EBCC E6 15 INC $15 $C0/EBCE E2 20 SEP #$20 $C0/EBD0 A5 19 LDA $19 ; Check next decompression flag $C0/EBD2 10 10 BPL $10 ; [$EBE4] Branch if it is not set $C0/EBD4 B7 0F LDA [$0F],y ; If decompression flag is SET, one byte gets transfered to WRAM as it is $C0/EBD6 8F 80 21 00 STA $002180 $C0/EBDA C8 INY ; Increment Load Index $C0/EBDB C2 20 REP #$20 A:00F1 X:0000 Y:E235 P:eNvMxdizc $C0/EBDD C6 12 DEC $12 [$00:0012] A:00F1 X:0000 Y:E235 P:eNvmxdizc $C0/EBDF D0 D9 BNE $D9 [$EBBA] A:00F1 X:0000 Y:E235 P:envmxdizc $C0/EBE1 4C 1B EC JMP $EC1B ; Exit $C0/EBE4 C2 20 REP #$20 A:0060 X:0000 Y:E238 P:envMxdizC $C0/EBE6 B7 0F LDA [$0F],y[$DF:E245] A:0060 X:0000 Y:E238 P:envmxdizC $C0/EBE8 18 CLC A:0002 X:0000 Y:E238 P:envmxdizC $C0/EBE9 6F DF 01 00 ADC $0001DF[$00:01DF] A:0002 X:0000 Y:E238 P:envmxdizc $C0/EBED 85 1E STA $1E [$00:001E] A:0002 X:0000 Y:E238 P:envmxdizc $C0/EBEF C8 INY A:0002 X:0000 Y:E238 P:envmxdizc $C0/EBF0 C8 INY A:0002 X:0000 Y:E239 P:eNvmxdizc $C0/EBF1 B7 0F LDA [$0F],y[$DF:E247] A:0002 X:0000 Y:E23A P:eNvmxdizc $C0/EBF3 29 FF 00 AND #$00FF A:0018 X:0000 Y:E23A P:envmxdizc $C0/EBF6 18 CLC A:0018 X:0000 Y:E23A P:envmxdizc $C0/EBF7 69 03 00 ADC #$0003 A:0018 X:0000 Y:E23A P:envmxdizc $C0/EBFA 85 21 STA $21 [$00:0021] A:001B X:0000 Y:E23A P:envmxdizc $C0/EBFC C8 INY A:001B X:0000 Y:E23A P:envmxdizc $C0/EBFD 5A PHY A:001B X:0000 Y:E23B P:eNvmxdizc $C0/EBFE A0 00 00 LDY #$0000 A:001B X:0000 Y:E23B P:eNvmxdizc $C0/EC01 E2 20 SEP #$20 A:001B X:0000 Y:0000 P:envmxdiZc $C0/EC03 B1 1E LDA ($1E),y[$7F:0002] A:001B X:0000 Y:0000 P:envMxdiZc $C0/EC05 8F 80 21 00 STA $002180[$00:2180] A:0054 X:0000 Y:0000 P:envMxdizc $C0/EC09 C8 INY A:0054 X:0000 Y:0000 P:envMxdizc $C0/EC0A C2 20 REP #$20 A:0054 X:0000 Y:0001 P:envMxdizc $C0/EC0C C6 21 DEC $21 [$00:0021] A:0054 X:0000 Y:0001 P:envmxdizc $C0/EC0E C6 12 DEC $12 ; 16-bit DEC number of bytes to do $C0/EC10 F0 08 BEQ $08 ; [$EC1A] Exit if all bytes are done $C0/EC12 A5 21 LDA $21 [$00:0021] A:0054 X:0000 Y:0001 P:envmxdizc $C0/EC14 10 EB BPL $EB [$EC01] A:001A X:0000 Y:0001 P:envmxdizc $C0/EC16 7A PLY A:FFFF X:0000 Y:001C P:eNvmxdizc $C0/EC17 4C BA EB JMP $EBBA [$C0:EBBA] A:FFFF X:0000 Y:E23B P:eNvmxdizc $C0/EC1A 7A PLY A:0008 X:0000 Y:00DC P:envmxdiZc $C0/EC1B AB PLB ; Restore Flag register, A/X/Y and Direct Bank $C0/EC1C C2 30 REP #$30 $C0/EC1E 7A PLY $C0/EC1F FA PLX $C0/EC20 68 PLA $C0/EC21 28 PLP $C0/EC22 60 RTS
$00/FF90 PROGRAM START
$00/FF90 78 SEI ; Disable Interrupts $00/FF91 18 CLC ; Native Mode $00/FF92 FB XCE $00/FF93 D8 CLD ; Deactivate Decimal Mode $00/FF94 5C 00 00 C0 JMP $C00000 ; Go to whole Boot Sequence / FastROM/HiROM
$00/FF98 NMI HANDLER
$00/FF98 5C E7 01 C0 JMP $C001E7 ; Jump to actual NMI Handler / FastROM/HiROM