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EarthBound/VRAM DMA Circular Queue: Difference between revisions
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==Auxiliary Data<span class="anchor" id="AuxiliaryData"></span>== | ==Auxiliary Data<span class="anchor" id="AuxiliaryData"></span>== | ||
* <tt>$7E0000</tt> (8-bit): | * <tt>$7E0000</tt> (8-bit): Entries end offset. Next queue position after the last entry. Also represents the position to write to on adding new entries. | ||
* <tt>$7E0001</tt> (8-bit): | * <tt>$7E0001</tt> (8-bit): Entries start offset. Position of the start of the first entry. | ||
==Usage== | ==Usage== | ||
Entries are added to the queue by the [[EarthBound:ASM:VRAM_DMA_Transfer_Routines#$C0865F|VRAM DMA Transfer Routine]] (unless that routine initiates a DMA transfer directly). If the routine finds that the queue is full, it simply loops until it is no longer full. | |||
Entries are removed by the [[EarthBound:ASM:VBLANK_Interrupt_Routine|VBLANK Interrupt Routine]] where the encoded DMA transfers are initiated. | |||
[[Category:EarthBound|VRAM DMA Circular Queue]] | [[Category:EarthBound|VRAM DMA Circular Queue]] | ||
Revision as of 20:35, 20 August 2023
This is a sub-page of EarthBound.
| VRAM DMA Circular Queue | |
| Game | EarthBound |
| Start Address | 0x7E0400 |
| End Address | 0x7E04FF |
| # of Entries | 32 |
| Entry Length | 8 bytes (0x08) |
| Total Length | 256 bytes (0x100) |
| Back to the RAM map | |
A circular queue storing queued-up VRAM DMA transfers to be made at the next VBLANK period.
Format
Transfer Style
- Length: 1 byte (0x1)
- Offset within entry: 0x00
- Range of values: 0x00-0x33
Offset into the VRAM DMA Transfer Style Table to get miscellaneous parameters for a DMA transfer.
Size
- Length: 2 bytes (0x2)
- Offset within entry: 0x01
- Range of values: 0x0000-0xFFFF
Transfer size in bytes.
Memory Address
- Length: 3 bytes (0x3)
- Offset within entry: 0x03
- Range of values: 0x000000-0xFFFFFF
CPU memory address (long pointer) for the "A" side of the DMA transfer.
VRAM Address
- Length: 2 bytes (0x2)
- Offset within entry: 0x06
- Range of values: 0x0000-0x7FFF
VRAM word address for the "B" side of the DMA transfer.
Auxiliary Data
- $7E0000 (8-bit): Entries end offset. Next queue position after the last entry. Also represents the position to write to on adding new entries.
- $7E0001 (8-bit): Entries start offset. Position of the start of the first entry.
Usage
Entries are added to the queue by the VRAM DMA Transfer Routine (unless that routine initiates a DMA transfer directly). If the routine finds that the queue is full, it simply loops until it is no longer full.
Entries are removed by the VBLANK Interrupt Routine where the encoded DMA transfers are initiated.