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Talk:PC-8801: Difference between revisions
(sourcecode from m88 with port data) |
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== m88 emulator source code (for reference) == | == m88 emulator source code (for reference) == | ||
[code] | |||
void PC88::OutPort(uint port, uint data) | void PC88::OutPort(uint port, uint data) | ||
{ | { | ||
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} | } | ||
} | } | ||
[/code] | |||
Revision as of 18:30, 4 March 2016
m88 emulator source code (for reference)
[code] void PC88::OutPort(uint port, uint data) { // Log2("(%.2x)<-%.2x\n", port, data); port &= 0xff; data &= 0xff; switch (port) { uint8 d;
case 0x00: case 0x01: case 0x02: textscreen->Out(port, data); return;
case 0x10: calender->Out(port, data); return;
case 0x30: crtc->Out(port, data); screen->Out30(data); return;
case 0x31: d = port31 ^ data; port31 = data; if (d & 0x06) SelectROM(); // Log0("\n"); screen->Out31(data); return;
case 0x32: d = port32 ^ data; port32 = data; if (d & 0x13) { SelectEROM(); SelectROM(); SelectTVRAM(); } screen->Out32(data); gvramselected = screen->IsGVRAMSelected(); sound->Out(port, data); // sintm = data & 0x80 ? ~0x300 : ~0; SetInterruptMask(); SetWaitTable(); return;
case 0x34: screen->Out34(data); return;
case 0x35: screen->Out35(data); gvramselected = screen->IsGVRAMSelected(); SetWaitTable(); return;
case 0x40: calender->Out(port, data); sound->Out40(data, GetClockCount()); port40o = data; SetWaitTable(); return;
case 0x44: case 0x45: case 0x46: case 0x47: case 0xa8: case 0xa9: case 0xaa: case 0xac: case 0xad: sound->Out(port, data); return;
case 0x50: case 0x51: crtc->Out(port, data); return;
case 0x52: screen->Out52(data); return;
case 0x53: screen->Out53(data); return;
case 0x54: screen->Out54(data); return;
case 0x55: case 0x56: case 0x57: case 0x58: case 0x59: case 0x5a: case 0x5b: screen->Out55to5b(port, data); return;
case 0x5c: case 0x5d: case 0x5e: case 0x5f: screen->Out5cto5f(port); gvramselected = screen->IsGVRAMSelected(); return;
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67: dmac.Out(port, data); return;
case 0x68: dmac.Out(port, data); // usetvram = !(port32 & 0x10); SetWaitTable(); break;
case 0x70: port70 = data; SetTextWindow(); return;
case 0x71: port71 = data; SelectEROM(); SelectROM(); // Log0("\n"); return;
case 0x78: port70++; SetTextWindow(); return;
case 0xe2: // Log2("(%.2x)<-%.2x\n", port, data); porte2 = data; SelectROM(); SelectRAM(); break;
case 0xe3: // Log2("(%.2x)<-%.2x\n", port, data); porte3 = data; SelectROM(); SelectRAM(); break;
case 0xe4: porte4 = data; SetInterruptMask(); return;
case 0xe6: porte6 = data; if (!(porte6 & 1)) CancelInterrupt(2*2); if (!(porte6 & 2)) CancelInterrupt(1*2); if (!(porte6 & 4)) CancelInterrupt(0*2); return;
case 0xe8: case 0xe9: kanjirom.Out(port, data); return;
case 0xec: case 0xed: kanjirom2.Out(port, data); return;
case 0xfc: case 0xfd: case 0xfe: case 0xff: fdsub->Out(port, data); return; } } [/code]