Bushi Seiryuuden/ROM map: Difference between revisions

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Chip tiny.png The following article is a ROM map for Bushi Seiryuuden.

Bank $80

$80/8057 - Start Up Register Clear up

$80/8057 E2 20       SEP #$20
$80/8059 A9 01       LDA #$01
$80/805B 8D 00 42    STA $4200      ; Disable NMI, enable Auto-Joypad-Read
$80/805E 8D 72 00    STA $0072      ; $4200 Buffer?
$80/8061 8D 0D 42    STA $420D      ; Activate Fast-ROM
$80/8064 9C 01 42    STZ $4201      ; Clear Programmable I/O port
$80/8067 9C 02 42    STZ $4202      ; Clear Multiplicand register
$80/806A 9C 03 42    STZ $4203      ; Clear Multiplicand register
$80/806D 9C 04 42    STZ $4204      ; Clear Dividend Register
$80/8070 9C 05 42    STZ $4205      ; Clear Dividend Register
$80/8073 9C 06 42    STZ $4206      ; Clear Divisor Register
$80/8076 9C 07 42    STZ $4207      ; H Timer (HBLANK Register)
$80/8079 9C 08 42    STZ $4208      ; H Timer (HBLANK Register)
$80/807C 9C 09 42    STZ $4209      ; V Timer (VBLANK Register)
$80/807F 9C 0A 42    STZ $420A      ; V Timer (VBLANK Register)
$80/8082 9C 0B 42    STZ $420B      ; Disable all DMAs
$80/8085 9C 0C 42    STZ $420C      ; Disable all HDMAs
$80/8088 C2 20       REP #$20
$80/808A 6B          RTL

$80/826D - Joypad Input Fetch subroutine

$80/826D A2 02 00    LDX #$0002              A:0000 X:CF76 Y:D04C P:envmxdIZC
$80/8270 BD 08 01    LDA $0108,x[$80:010A]   A:0000 X:0002 Y:D04C P:envmxdIzC
$80/8273 F0 05       BEQ $05    [$827A]      A:0000 X:0002 Y:D04C P:envmxdIZC
$80/827A E2 20       SEP #$20                A:0000 X:0002 Y:D04C P:envmxdIZC
$80/827C AD 12 42    LDA $4212  [$80:4212]   A:0000 X:0002 Y:D04C P:envMxdIZC
$80/827F 29 01       AND #$01                A:0082 X:0002 Y:D04C P:eNvMxdIzC
$80/8281 D0 F9       BNE $F9    [$827C]      A:0000 X:0002 Y:D04C P:envMxdIZC
$80/8283 C2 20       REP #$20                A:0000 X:0002 Y:D04C P:envMxdIZC
$80/8285 BD 18 42    LDA $4218,x[$80:421A]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/8288 9D 10 01    STA $0110,x[$80:0112]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/828B 5D 1C 01    EOR $011C,x[$80:011E]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/828E 3D 10 01    AND $0110,x[$80:0112]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/8291 9D 14 01    STA $0114,x[$80:0116]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/8294 9D 18 01    STA $0118,x[$80:011A]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/8297 BD 10 01    LDA $0110,x[$80:0112]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/829A F0 18       BEQ $18    [$82B4]      A:0000 X:0002 Y:D04C P:envmxdIZC
$80/82B4 AD 04 01    LDA $0104  [$80:0104]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/82B7 9D 28 01    STA $0128,x[$80:012A]   A:0028 X:0002 Y:D04C P:envmxdIzC
$80/82BA BD 10 01    LDA $0110,x[$80:0112]   A:0028 X:0002 Y:D04C P:envmxdIzC
$80/82BD 9D 1C 01    STA $011C,x[$80:011E]   A:0000 X:0002 Y:D04C P:envmxdIZC
$80/82C0 CA          DEX                     A:0000 X:0002 Y:D04C P:envmxdIZC
$80/82C1 CA          DEX                     A:0000 X:0001 Y:D04C P:envmxdIzC
$80/82C2 10 AC       BPL $AC    [$8270]      A:0000 X:0000 Y:D04C P:envmxdIZC
$80/82C4 AD 14 01    LDA $0114  [$80:0114]   A:0000 X:FFFE Y:D04C P:eNvmxdIzC
$80/82C7 2D 32 01    AND $0132  [$80:0132]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82CA 8D 2E 01    STA $012E  [$80:012E]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82CD AD 10 01    LDA $0110  [$80:0110]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82D0 2D 32 01    AND $0132  [$80:0132]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82D3 8D 2C 01    STA $012C  [$80:012C]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82D6 AD 18 01    LDA $0118  [$80:0118]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82D9 2D 32 01    AND $0132  [$80:0132]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82DC 8D 30 01    STA $0130  [$80:0130]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82DF AD 10 01    LDA $0110  [$80:0110]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82E2 29 00 08    AND #$0800              A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82E5 F0 03       BEQ $03    [$82EA]      A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82EA 8D 64 01    STA $0164  [$80:0164]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82ED AD 10 01    LDA $0110  [$80:0110]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82F0 29 00 04    AND #$0400              A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82F3 F0 03       BEQ $03    [$82F8]      A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82F8 8D 66 01    STA $0166  [$80:0166]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82FB AD 64 01    LDA $0164  [$80:0164]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/82FE D0 0E       BNE $0E    [$830E]      A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/8300 AD 10 01    LDA $0110  [$80:0110]   A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/8303 29 80 00    AND #$0080              A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/8306 D0 06       BNE $06    [$830E]      A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/8308 A9 02 00    LDA #$0002              A:0000 X:FFFE Y:D04C P:envmxdIZC
$80/830B 8D 64 01    STA $0164  [$80:0164]   A:0002 X:FFFE Y:D04C P:envmxdIzC
$80/830E 60          RTS                     A:0002 X:FFFE Y:D04C P:envmxdIzC

$80/857C - VRAM DMA

When this subroutine is called, there were done some register preparations before:

$28-A DMA Source Address.

$2C/D contain the VRAM destination.

$2E/F contains the number of bytes to transfer.

$80/857C 8B          PHB          ; Buffer Program Bank on Stack
$80/857D 4B          PHK          ; Set current Bank ($80) as Program Bank
$80/857E AB          PLB
$80/857F E2 20       SEP #$20
$80/8581 A9 00       LDA #$00     ; HDMA deactivation
$80/8583 8D 0C 42    STA $420C
$80/8586 A9 80       LDA #$80     ; VRAM transfer setting
$80/8588 8D 15 21    STA $2115
$80/858B A5 2C       LDA $2C      ; VRAM Destination
$80/858D 8D 16 21    STA $2116
$80/8590 A5 2D       LDA $2D
$80/8592 8D 17 21    STA $2117
$80/8595 A9 01       LDA #$01     ; DMA transfer settings, write 2 registers
$80/8597 8D 00 43    STA $4300
$80/859A A5 28       LDA $28      ; DMA Source Address
$80/859C 8D 02 43    STA $4302
$80/859F A5 29       LDA $29
$80/85A1 8D 03 43    STA $4303
$80/85A4 A5 2A       LDA $2A
$80/85A6 8D 04 43    STA $4304
$80/85A9 A9 18       LDA #$18     ; VRAM destination: ($21)18 - VRAM
$80/85AB 8D 01 43    STA $4301
$80/85AE A5 2E       LDA $2E      ; Number of bytes to transfer
$80/85B0 8D 05 43    STA $4305
$80/85B3 A5 2F       LDA $2F
$80/85B5 8D 06 43    STA $4306
$80/85B8 A9 01       LDA #$01     ; Activate DMA
$80/85BA 8D 0B 42    STA $420B
$80/85BD AF 74 00 80 LDA $800074  ; Reactivate HDMAs
$80/85C1 8D 0C 42    STA $420C
$80/85C4 C2 20       REP #$20
$80/85C6 AB          PLB          ; Restore Program Bank
$80/85C7 6B          RTL

$80/85CD - VRAM Clear DMA

This Subroutine uses a DMA to clear VRAM.

A contains the VRAM destinations.

Y contains the number of Bytes to transfer

$80/85CD 8B          PHB          ; Buffer Program Bank on Stack
$80/85CE 4B          PHK          ; Set current Bank ($80) as Program Bank
$80/85CF AB          PLB
$80/85D0 8D 16 21    STA $2116    ; VRAM Destination
$80/85D3 8C 05 43    STY $4305    ; DMA Number of Bytes to transfer
$80/85D6 9C 00 00    STZ $0000    ; Clear 
$80/85D9 9C 02 43    STZ $4302    ; DMA
$80/85DC 9C 04 43    STZ $4304
$80/85DF E2 20       SEP #$20
$80/85E1 A9 00       LDA #$00     ; Deactivate HDMA
$80/85E3 8F 0C 42 00 STA $00420C
$80/85E7 A9 18       LDA #$18     ; DMA Destination: ($21)18
$80/85E9 8D 01 43    STA $4301
$80/85EC A9 09       LDA #$09     ; Fixed Transfer
$80/85EE 8D 00 43    STA $4300
$80/85F1 A9 80       LDA #$80     ; VRAM transfer
$80/85F3 8D 15 21    STA $2115
$80/85F6 A9 01       LDA #$01     ; Activate DMA
$80/85F8 8D 0B 42    STA $420B
$80/85FB AF 74 00 80 LDA $800074  ; Reactivate HDMA
$80/85FF 8F 0C 42 00 STA $00420C
$80/8603 C2 20       REP #$20
$80/8605 AB          PLB          ; Restore Program Bank
$80/8606 6B          RTL

$80/8FB1 - OAM Update

$80/8FB1 8B          PHB          ; Buffer Program Bank on Stack
$80/8FB2 F4 80 80    PEA $8080    ; Set Program Bank to $80
$80/8FB5 AB          PLB
$80/8FB6 AB          PLB          ; You can only push a 16-bit value on stack, so you have to pull two bytes from stack
$80/8FB7 E2 20       SEP #$20
$80/8FB9 A9 00       LDA #$00     ; Set the OAM address to $0000
$80/8FBB 8F 03 21 00 STA $002103
$80/8FBF 8F 02 21 00 STA $002102
$80/8FC3 A9 00       LDA #$00     ; DMA Settings
$80/8FC5 8D 00 43    STA $4300
$80/8FC8 A9 04       LDA #$04     ; DMA Destination: $2104 (OAM)
$80/8FCA 8D 01 43    STA $4301
$80/8FCD A9 00       LDA #$00     ; DMA Source Address: $7E2800
$80/8FCF 8D 02 43    STA $4302
$80/8FD2 A9 28       LDA #$28
$80/8FD4 8D 03 43    STA $4303
$80/8FD7 A9 7E       LDA #$7E
$80/8FD9 8D 04 43    STA $4304
$80/8FDC A9 20       LDA #$20     ; Number of Bytes to transfer: $220
$80/8FDE 8D 05 43    STA $4305
$80/8FE1 A9 02       LDA #$02
$80/8FE3 8D 06 43    STA $4306
$80/8FE6 A9 01       LDA #$01     ; Activate DMA
$80/8FE8 8F 0B 42 00 STA $00420B
$80/8FEC C2 20       REP #$20
$80/8FEE AB          PLB          ; Restore Program Bank
$80/8FEF 6B          RTL

$80/D1DF - VRAM DMA

$28–$2A contain the 24-bit Source Adress

$2C/D contain the VRAM destination

$2E/F contain the number of bytes to transfer

$80/D1DF E2 20       SEP #$20
$80/D1E1 A9 00       LDA #$00     ; Deactivate HDMA
$80/D1E3 8D 0C 42    STA $420C
$80/D1E6 C2 20       REP #$20
$80/D1E8 A5 28       LDA $28      ; Set the DMA Source Address
$80/D1EA 8D 02 43    STA $4302
$80/D1ED A5 2C       LDA $2C      ; Set VRAM destination
$80/D1EF 8D 16 21    STA $2116
$80/D1F2 A5 2E       LDA $2E      ; Set the number of bytes to transfer
$80/D1F4 8D 05 43    STA $4305
$80/D1F7 E2 20       SEP #$20
$80/D1F9 A5 2A       LDA $2A      ; Set the DMA Source Bank
$80/D1FB 8D 04 43    STA $4304
$80/D1FE A9 01       LDA #$01     ; DMA transfer settings
$80/D200 8D 00 43    STA $4300
$80/D203 A9 18       LDA #$18     ; VRAM Destination
$80/D205 8D 01 43    STA $4301
$80/D208 A9 80       LDA #$80     ; VRAM Transfer Settings
$80/D20A 8D 15 21    STA $2115
$80/D20D A9 01       LDA #$01     ; Activate DMA
$80/D20F 8D 0B 42    STA $420B
$80/D212 AF 74 00 80 LDA $800074  ; Reactivate HDMA
$80/D216 8F 0C 42 00 STA $00420C
$80/D21A C2 20       REP #$20
$80/D21C 60          RTS

$80/F368 - CGRAM DMA

This subroutine updates the palette RAM.

$00 contains the CGRAM destination.

$04–6 contains the (24-bit) source address

$08/9 contains the number of bytes to transfer

$80/F368 8B          PHB          ; Buffer Program Bank on Stack
$80/F369 4B          PHK          ; Set current Bank ($80) as Program Bank
$80/F36A AB          PLB
$80/F36B E2 20       SEP #$20
$80/F36D A9 00       LDA #$00     ; Deactivate HDMA
$80/F36F 8D 0C 42    STA $420C
$80/F372 A5 00       LDA $00      ; Set the CGRAM address
$80/F374 8D 21 21    STA $2121
$80/F377 A9 02       LDA #$02     ; DMA transfer settings: Write one register twice
$80/F379 8D 00 43    STA $4300
$80/F37C A9 22       LDA #$22     ; DMA transfer destination: ($21)22
$80/F37E 8D 01 43    STA $4301
$80/F381 A5 04       LDA $04      ; Set up DMA transfer source address
$80/F383 8D 02 43    STA $4302
$80/F386 A5 05       LDA $05
$80/F388 8D 03 43    STA $4303
$80/F38B A5 06       LDA $06
$80/F38D 8D 04 43    STA $4304
$80/F390 A5 08       LDA $08      ; Number of bytes to transfer
$80/F392 8D 05 43    STA $4305
$80/F395 A5 09       LDA $09
$80/F397 8D 06 43    STA $4306
$80/F39A A9 01       LDA #$01     ; Activate DMA
$80/F39C 8D 0B 42    STA $420B
$80/F39F AF 74 00 80 LDA $800074  ; Reactivate HDMA
$80/F3A3 8D 0C 42    STA $420C
$80/F3A6 C2 20       REP #$20
$80/F3A8 AB          PLB          ; Restore Program Bank
$80/F3A9 6B          RTL

$80/F368 - CGRAM Load Subroutine

This subroutine copies the whole content of the CGRAM to $7FC70D - $7FC90C and $7FC90D - $7FCB0C.

$80/F117 8B          PHB          ; Buffer Program Bank on Stack
$80/F118 4B          PHK          ; Set current Bank ($80) as Program Bank
$80/F119 AB          PLB
$80/F11A E2 20       SEP #$20
$80/F11C A9 00       LDA #$00     ; Deactivate HDMAs
$80/F11E 8D 0C 42    STA $420C
$80/F121 9C 21 21    STZ $2121    ; Set CGRAM address to $00
$80/F124 A9 80       LDA #$80     ; DMA Transfer options: Transfer FROM CGRAM TO WRAM
$80/F126 8D 00 43    STA $4300
$80/F129 A9 3B       LDA #$3B     ; Load Data from $213B (CGRAM Read Register)
$80/F12B 8D 01 43    STA $4301
$80/F12E A9 0D       LDA #$0D     ; Destination in WRAM: $7FC70D
$80/F130 8D 02 43    STA $4302
$80/F133 A9 C7       LDA #$C7
$80/F135 8D 03 43    STA $4303
$80/F138 A9 7F       LDA #$7F
$80/F13A 8D 04 43    STA $4304
$80/F13D A9 00       LDA #$00     ; Transfer $200 bytes - whole CGRAM
$80/F13F 8D 05 43    STA $4305
$80/F142 A9 02       LDA #$02
$80/F144 8D 06 43    STA $4306
$80/F147 A9 01       LDA #$01     ; Activate DMA
$80/F149 8D 0B 42    STA $420B
$80/F14C A9 80       LDA #$80     ; DMA Transfer options: Transfer FROM CGRAM TO WRAM
$80/F14E 8D 00 43    STA $4300
$80/F151 A9 3B       LDA #$3B     ; Load Data from $213B (CGRAM Read Register)
$80/F153 8D 01 43    STA $4301
$80/F156 A9 0D       LDA #$0D     ; Destination in WRAM: $7FC90D
$80/F158 8D 02 43    STA $4302
$80/F15B A9 C9       LDA #$C9
$80/F15D 8D 03 43    STA $4303
$80/F160 A9 7F       LDA #$7F
$80/F162 8D 04 43    STA $4304
$80/F165 A9 00       LDA #$00     ; Transfer $200 bytes - whole CGRAM
$80/F167 8D 05 43    STA $4305
$80/F16A A9 02       LDA #$02
$80/F16C 8D 06 43    STA $4306
$80/F16F A9 01       LDA #$01     ; Activate DMA
$80/F171 8D 0B 42    STA $420B
$80/F174 AD 74 00    LDA $0074    ; Reactivate HDMA
$80/F177 8D 0C 42    STA $420C
$80/F17A C2 20       REP #$20
$80/F17C AB          PLB          ; Restore Program Bank
$80/F17D 6B          RTL

Bank $81

$81/A48A - Update Scroll Registers

$81/A48A 8B          PHB          ; Buffer Program Bank on Stack
$81/A48B 4B          PHK          ; Set current Bank ($81) as Program Bank
$81/A48C AB          PLB
$81/A48D AD 13 16    LDA $1613    ; ??? Calculate BG1 H-Scroll
$81/A490 18          CLC
$81/A491 6D 17 16    ADC $1617    ; ???
$81/A494 85 00       STA $00      ; ???
$81/A496 AD 1B 16    LDA $161B    ; ??? Calculate BG1 V-Scroll
$81/A499 18          CLC
$81/A49A 6D 1F 16    ADC $161F    ; ???
$81/A49D 3A          DEC A        ; ???
$81/A49E 85 02       STA $02      ; ???
$81/A4A0 AD 23 16    LDA $1623    ; ??? Calculate BG2 H-Scroll
$81/A4A3 18          CLC
$81/A4A4 6D 27 16    ADC $1627    ; ???
$81/A4A7 85 04       STA $04      ; ???
$81/A4A9 AD 2B 16    LDA $162B    ; ??? Calculate BG2 V-Scroll
$81/A4AC 18          CLC
$81/A4AD 6D 2F 16    ADC $162F    ; ???
$81/A4B0 3A          DEC A        ; ???
$81/A4B1 85 06       STA $06      ; ???
$81/A4B3 E2 20       SEP #$20
$81/A4B5 A5 00       LDA $00      ; Update BG1 H-Scroll
$81/A4B7 8D 0D 21    STA $210D
$81/A4BA A5 01       LDA $01
$81/A4BC 8D 0D 21    STA $210D
$81/A4BF A5 02       LDA $02      ; Update BG1 V-Scroll
$81/A4C1 8D 0E 21    STA $210E
$81/A4C4 A5 03       LDA $03
$81/A4C6 8D 0E 21    STA $210E
$81/A4C9 A5 04       LDA $04      ; Update BG2 H-Scroll
$81/A4CB 8D 0F 21    STA $210F
$81/A4CE A5 05       LDA $05
$81/A4D0 8D 0F 21    STA $210F
$81/A4D3 A5 06       LDA $06      ; Update BG2 V-Scroll
$81/A4D5 8D 10 21    STA $2110
$81/A4D8 A5 07       LDA $07
$81/A4DA 8D 10 21    STA $2110
$81/A4DD AD 33 16    LDA $1633    ; Update BG3 H-Scroll
$81/A4E0 8D 11 21    STA $2111
$81/A4E3 AD 34 16    LDA $1634
$81/A4E6 8D 11 21    STA $2111
$81/A4E9 AD 3B 16    LDA $163B    ; Update BG3 V-Scroll
$81/A4EC 8D 12 21    STA $2112
$81/A4EF AD 3C 16    LDA $163C
$81/A4F2 8D 12 21    STA $2112
$81/A4F5 C2 30       REP #$30
$81/A4F7 AB          PLB          ; Restore Program Bank
$81/A4F8 6B          RTL